Hero Image

EV12AS200

Discontinued

product image

EV12AS200

The EV12AS200 is a 12-bit 1.5 GSps ADC. The device includes a front-end Track and Hold stage (T/H), followed by an analog encoding stage (Analog Quantizer) which outputs analog residues resulting from analog quantization. Successive banks of latches regenerate the analog residues into logical levels before entering an error correction circuitry and a resynchronization stage followed by a DEMUX with 100Ω differential output buffers. It integrates 3 Wire Serial Interface (3WSI) circuit (write only), which can be activated or deactivated (via Mode signal). Main functions accessed via the 3WSI can also be accessed by hardware (OA, GA, SDA, SDAEN_n, TM_n, RS pin).

Download Datasheet

Features

  • Channels: 1
  • Package: FPBGA196
  • Rate: 1.5 GSps
  • Resolution: 12-bit
  • Temperature Range: -40 to +110C

General

  • Status: Replaced by Rev A

Qualification

  • Space Grade: No

TYPE

TYPE

EV12AS200 Application Note

Type: PDF

Download

EV12AS200 BDC Checklist

Type: PDF

Download

EV12AS200 Board Layout

Type: PDF

Download

EV12AS200 Datasheet

Type: PDF

Download

EV12AS200 Demo Kit summary

Type: PDF

Download

Ev12as200 Qualification Report

Type: PDF

Download

EV12AS200AGS EB User Guide

Type: PDF

Download

EV12AS200ZPY EB User Guide

Type: PDF

Download

Contact Us

Get in touch for technical specifications, pricing, and delivery information. Our team is ready to provide detailed support on product availability, timelines, testing protocols, and compliance.

Get Detailed Pricing, Delivery, Timelines, and Marketing Support

Optin

By submitting you agree to Teledyne Technologies privacy policy and cookie policy.